DRV8308_15 Datasheet, PDF (37/60 Pages) Texas Instruments – DRV8308 Brushless DC Motor Controller

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DRV8308
SLVSCF7A – FEBRUARY 2014 – REVISED OCTOBER 2014
Programming (continued)
8.5.3 Programming the OTP Configuration Memory
To permanently program the non-volatile OTP memory, first write all the data into the registers as described
previously, and then follow this sequence:
Table 6. Programming the OTP Configuration Memory
ADDRESS
--
0x2D
0x2D
0x2D
0x2D
0x39
--
0x2D
DATA
--
0x1213
0x1415
0x1617
0x1819
0x0002
--
0EDD
ACTION
device ENABLE must be
active
write
write
write
write
write
wait 10 ms minimum
write
The internal OTP memory can only be programmed once. After programming, the registers can still be
overwritten by accesses through the SPI port, or by using an external EEPROM.
8.6 Register Map
8.6.1 Control Registers
The DRV8308 device uses internal registers to set operation parameters, including the characteristics of the
speed control loop, commutation settings, gate drive current, and so forth. The registers are programmed
through a serial SPI communications interface. In addition, the registers can be permanently programmed into
non-volatile OTP memory, or loaded from an external serial EEPROM device.
This is the register map:
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x2A
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
AG_SETPT
ENPOL
RSVD
SPDREVS
BASIC
SPEEDTH
LRTIME
HALLRST
DELAY
RSVD
INTCLK
HALLPOL
RSVD
BYPFILT
RSVD
RSVD
BYPCOMP
AA_SETPT
OCPDEG
OCPTH
OVTH
RSVD
RSVD
Bit 10
Bit 9
Bit 8
DIRPOL BRKPOL SYNRECT
AUTOADV AUTOGAIN ENSINE
VREG_EN
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
PWMF
SPDMODE
FGSEL
ADVANCE
MINSPD
MOD120
TDRIVE
DTIME
SPDGAIN
FILK1
FILK2
COMK1
COMK2
LOOPGAIN
SPEED
RLOCK VMOV CPFAIL UVLO
OTS
Bit 1
Bit 0
BRKMOD RETRY
IDRIVE
CPOC
OCP
Figure 25. Control Register Map
At power-up, when VM rises above the VM reset threshold, or whenever RESET is toggled, the register contents
are loaded from the OTP memory or EEPROM (depending on SMODE). For details on external EEPROM
connections, see External EEPROM Mode. If the OTP has not been programmed and the DRV8308 device is
powered-up with SMODE low, the default register values are all 0, except for the FAULT register, which defaults
to 0x18. FAULT bits can be cleared by writing 0.
At any time, the register contents may be written or overwritten through the SPI interface.
For detailed descriptions for each register, refer to the prior sections.
Copyright © 2014, Texas Instruments Incorporated
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