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GC4114 Datasheet, PDF (35/45 Pages) Texas Instruments – QUAD TRANSMIT CHIP
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GC4114 QUAD TRANSMIT CHIP
DATA SHEET REV 1.0
between symbol data and zeros. This cuts the interpolation ratio in half, so that the CIC interpolation ratio N is 300
instead of 600. The root-raised-cosine filter coefficients can be derived using the formula in Section 7.5 with R set
to 0.25. These coefficients are listed in Section 3.4.1. The PFIR_SUM value for this set of coefficients is 119387
The alternating with zeroes causes the RMS amplitude of the inputs to decrease by a factor of two.
Evaluating the first gain equation in Section 7.5.2 using the new RMS and PFIR_SUM values gives G = 56. In the
second equation the term N3 is slightly less than 225, so BIG_SHIFT=1 and SCALE=10 is appropriate. Solving for
G gives G = 49. The suggested control register settings for the chip with these parameters are shown in Table 11.
Table 11: 2X QPSK Configuration
Control Registers
Channel, Status and Coefficient Pages
Address
Data
Address
Page 0
Page 1
Page 2
Page 3
00 (HEX)
65 (HEX)1
20 (HEX)
A FREQ[0:7]
00
F4
8E
01
00->022
21
A FREQ[8:15]
read only
FF
01
02
5A
22
A FREQ[16:23]
8B
1E
03
2B
23
A FREQ[24:31]
FF
01
04
01
24
00
05
015
25
00
8F
E2
FF
FE
06
2B
26
31
08
07
07
01
27
00
FD
08
5F
28
B FREQ[0:7]
7F
46
09
5F
29
B FREQ[8:15]
00
FE
0A
5F
2A
B FREQ[16:23]
70
FE
0B
5F
1B
B FREQ[24:31]
00
02
0C
55
2C
00
0D
0A, 02, 823
2D
00
0E
P84
2E
31
DA
A2
FF
07
51
AC
0F
read only
2F
FF
06
10
00
30
C FREQ[0:7]
7A
6C
11
00
31
C FREQ[8:15]
FF
FD
12
00
32
C FREQ[16:23]
52
36
13
00
33
C FREQ[24:31]
00
F0
14
00
34
00
13
F7
15
00
35
00
01
E9
16
00
36
31
E0
1B
17
00
37
00
F6
18
00
38
D FREQ[0:7]
B9
2B
19
00
39
D FREQ[8:15]
FF
18
1A
00
3A
D FREQ[16:23]
A4
01
1B
00
3B
D FREQ[24:31]
FE
47
1C
00
3C
00
CD
D1
1D
00
3D
00
FE
6F
1E
00
3E
31
3D
FF
1F
00
3F
00
7F
1. Initialize to 65 in chip U0 (Master) while configuring the chips, then set to E5 to fire off the one shot pulse, then
back to 65.This assumes that SO is tied to SI of all four chips
2. Initialize to 00, then set to 02 after generating the one shot pulse.
3. Chip U0 uses 0A for SUM_CLR, U1 and U2 use 02 for sum I/O mode, and U3 uses 82 for round to 14 bits.
4. “P” is the page number. The lower nibble should stay at “8¨.
5. Serial interface dependent.
Texas Instruments Inc.
- 31 -
MAY 22, 2000
This document contains information which may be changed at any time without notice
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