GC4114 Datasheet, PDF (3/45 Pages) Texas Instruments – QUAD TRANSMIT CHIP

GC4114 QUAD TRANSMIT CHIP
DATA SHEET REV 1.0
1.0
KEY FEATURES..........................................................................................................................1
2.0
BLOCK DIAGRAM ......................................................................................................................1
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
FUNCTIONAL DESCRIPTION ....................................................................................................2
CONTROL INTERFACE........................................................................................................................ 2
INPUT FORMAT.................................................................................................................................... 3
GAIN...................................................................................................................................................... 5
THE UP-CONVERTERS ....................................................................................................................... 5
THE OVERALL INTERPOLATION FILTER RESPONSE ..................................................................... 9
THE SUM TREE.................................................................................................................................... 9
OVERALL GAIN .................................................................................................................................. 10
CLOCKING.......................................................................................................................................... 11
SYNCHRONIZATION.......................................................................................................................... 11
POWER DOWN MODES .................................................................................................................... 11
DIAGNOSTICS.................................................................................................................................... 11
INITIAL BOARD DEBUG PROCEDURE............................................................................................. 11
4.0
PACKAGING .............................................................................................................................12
5.0
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
5.13
5.14
5.15
CONTROL REGISTERS............................................................................................................14
SYNC MODE REGISTER ................................................................................................................... 15
INTERPOLATION MODE REGISTER ................................................................................................ 16
INTERPOLATION GAIN REGISTER .................................................................................................. 16
INTERPOLATION REGISTERS.......................................................................................................... 17
INPUT MODE REGISTER................................................................................................................... 17
COUNTER MODE REGISTER............................................................................................................ 18
CHANNEL SYNC REGISTERS........................................................................................................... 18
CHANNEL FLUSH CONTROL REGISTER......................................................................................... 19
SUMMER MODE REGISTER ............................................................................................................. 19
STATUS CONTROL REGISTER ........................................................................................................ 20
CHECKSUM REGISTER..................................................................................................................... 20
CHANNEL INPUT REGISTERS.......................................................................................................... 21
PAGE ZERO (CHANNEL CONTROL) REGISTERS........................................................................... 21
PAGE ONE (STATUS AND TEST) REGISTERS................................................................................ 22
PAGES TWO AND THREE (COEFFICIENT) REGISTERS................................................................ 23
6.0
6.1
6.2
6.3
6.4
6.5
SPECIFICATIONS .....................................................................................................................24
ABSOLUTE MAXIMUM RATINGS ...................................................................................................... 24
RECOMMENDED OPERATING CONDITIONS.................................................................................. 24
THERMAL CHARACTERISTICS ........................................................................................................ 24
DC CHARACTERISTICS .................................................................................................................... 25
AC CHARACTERISTICS..................................................................................................................... 26
7.0
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
APPLICATION NOTES..............................................................................................................27
POWER AND GROUND CONNECTIONS.......................................................................................... 27
STATIC SENSITIVE DEVICE.............................................................................................................. 27
SYNCHRONIZING MULTIPLE GC4114 CHIPS ................................................................................. 27
THERMAL MANAGEMENT................................................................................................................. 27
PULSE SHAPING AND MODULATING QPSK OR QAM DATA......................................................... 28
DIAGNOSTICS.................................................................................................................................... 32
OUTPUT TEST CONFIGURATION .................................................................................................... 36
INPUT TEST CONFIGURATION ........................................................................................................ 37
PERIODIC SYNC MODE .................................................................................................................... 38
Texas Instruments Inc.
- iii -
MAY 22, 2000
This document contains information which may be changed at any time without notice