GC4114 Datasheet, PDF (17/45 Pages) Texas Instruments – QUAD TRANSMIT CHIP

GC4114 QUAD TRANSMIT CHIP
DATA SHEET REV 1.0
SIGNAL
SIN-A,B,C,D
SCK-A,B,C,D
SFS-A,B,C,D
REQ
CK
CK2X
CKMODE
SI
SO
IN[0:15]
OUT[0:15]
C[0:7]
A[0:5]
RD
WR
CE
VUP
DESCRIPTION
BIT SERIAL INPUT DATA, Active high
The bit serial input data for the four channels. The I and Q halves of complex data are entered on the same
pin. Each time the chip asserts REQ (See below) the I-half is entered and then the Q-half.
BIT SERIAL DATA CLOCK, Active high or low
The serial data bits are clocked into the chip by these clocks. The active edge of these clocks are user
programmable.
BIT SERIAL FRAME STROBE, Active high or low
The bit serial word strobe. This strobe delineates the 16 bit words within the bit serial input stream. This
strobe can be a pulse at the beginning of each bit serial word, or can act as a window enable which is active
while the data bits are active.
REQUEST FLAG, programmable active high or low
The chip requests new input data by asserting this signal. The width in input clock cycles and polarity of this
signal are user programmable. This signal is typically used as an interrupt to a DSP chip, but can also be
used as a start pulse to dedicated circuitry.
INPUT CLOCK. Active high
The clock input to the chip. The IN[0:15] and SI input signals are clocked into the chip on the rising edge of
this clock.
DOUBLE RATE INPUT CLOCK. Active high
The double rate clock input to the chip. Used in the alternate clock mode to clock the chip. This clock must
be exactly twice the frequency of the CK clock. Should be grounded in the normal clock mode.
CLOCK MODE, Active high
The clock mode control. The chip uses CK2X when this pin is tied high (alternate mode) to clock the internal
circuitry. When this signal is grounded (normal mode) the chip doubles the CK clock to use as the internal
clock.
SYNC IN. Active low
The sync input to the chip. All timers, accumulators, and control counters are, or can be, synchronized to SI.
This sync is clocked into the chip on the rising edge of the input clock (CK).
SYNC OUT. Active low
This signal is either a delayed version of the input sync SI, the sync counter’s terminal count (TC), or a
one-shot strobe. The SO signal is clocked out of the chip on the rising edge of the input clock (CK).
SUMMER INPUT DATA. Active high
The 16 bit two’s complement summer input samples. New samples are clocked into the chip on the rising
edge of the clock. The input data rate is assumed to be equal to the clock rate.
SUMMER OUTPUT DATA. Active high
The summer data are output as a 16 bit words on these pins. The bits are clocked out on the rising edge of
the clock (CK).
CONTROL DATA I/O BUS. Active high
This is the 8 bit control data I/O bus. Control register data is loaded into the chip or read from the chip through
these pins. The chip will only drive these pins when CE is low and RD is low.
CONTROL ADDRESS BUS. Active high
These pins are used to address the control registers within the chip. Each of the control registers within the
chip are assigned a unique address. A control register can be written to or read from by setting A[0:5] to the
register’s address.
READ ENABLE. Active low
This pin enables the chip to output the contents of the selected register on the C[0:7] pins when CE is also
low.
WRITE ENABLE. Active low
This pin enables the chip to write the value on the C[0:7] pins into the selected register when CE is also low.
CHIP ENABLE. Active low
This control strobe enables the read or write operation. The contents of the register selected by A[0:5] will
be output on C[0:7] when RD is low and CE is low. If WR is low and CE is low, then the selected register will
be loaded with the contents of C[0:7].
MICROPROCESSOR INTERFACE VOLTAGE.
This pin is used to set the voltage interface levels for the following control pins: C[0:7], A[0:5], CE, RD, WR,
SIN-A, SIN-B, SIN-C, SIN-D, SCK-A, SCK-B, SCK-C, SCK-D, SFS-A, SFS-B, SFS-C, and SFS-D. This pin
can be tied to +5 volts to interface the GC4114 to microprocessors with TTL outputs. Tie this pin to +3.3 volts
(VCC) to interface with 3.3 volt microprocessors.
Texas Instruments Inc.
- 13 -
MAY 22, 2000
This document contains information which may be changed at any time without notice