CC430F6147_15 Datasheet, PDF (35/118 Pages) Texas Instruments – MSP430 SoC With RF Core

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DMA module control 0
DMA module control 1
DMA module control 2
DMA module control 3
DMA module control 4
DMA interrupt vector
ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F614x
CC430F514x
CC430F512x
SLAS555A – NOVEMBER 2012 – REVISED FEBRUARY 2013
Table 38. DMA Module Control Registers (Base Address: 0500h)
REGISTER DESCRIPTION
REGISTER
DMACTL0
00h
DMACTL1
02h
DMACTL2
04h
DMACTL3
06h
DMACTL4
08h
DMAIV
0Ah
OFFSET
Table 39. DMA Channel 0 Registers (Base Address: 0510h)
REGISTER DESCRIPTION
DMA channel 0 control
DMA channel 0 source address low
DMA channel 0 source address high
DMA channel 0 destination address low
DMA channel 0 destination address high
DMA channel 0 transfer size
REGISTER
DMA0CTL
00h
DMA0SAL
02h
DMA0SAH
04h
DMA0DAL
06h
DMA0DAH
08h
DMA0SZ
0Ah
OFFSET
Table 40. DMA Channel 1 Registers (Base Address: 0520h)
REGISTER DESCRIPTION
DMA channel 1 control
DMA channel 1 source address low
DMA channel 1 source address high
DMA channel 1 destination address low
DMA channel 1 destination address high
DMA channel 1 transfer size
REGISTER
DMA1CTL
00h
DMA1SAL
02h
DMA1SAH
04h
DMA1DAL
06h
DMA1DAH
08h
DMA1SZ
0Ah
OFFSET
Table 41. DMA Channel 2 Registers (Base Address: 0530h)
REGISTER DESCRIPTION
DMA channel 2 control
DMA channel 2 source address low
DMA channel 2 source address high
DMA channel 2 destination address low
DMA channel 2 destination address high
DMA channel 2 transfer size
REGISTER
DMA2CTL
00h
DMA2SAL
02h
DMA2SAH
04h
DMA2DAL
06h
DMA2DAH
08h
DMA2SZ
0Ah
OFFSET
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