TLK2208B Datasheet, PDF (30/40 Pages) Texas Instruments – 8-PORT GIGABIT ETHERNET TRANCSEIVER

TLK2208B
8ĆPORT GIGABIT ETHERNET TRANSCEIVER
SLLS578D − AUGUST 2003 − REVISED SEPTEMBER 2006
Table 19. Control Register 6 (0x18) Bit Definitions
BIT(S)
24.15
DEFAULT
VALUE = 0x100C
0b
NAME
GEMODE
24.14
0b
24.13
0b
24.12
1b
24.11.10 00b
24.9
0b
24.8
0b
24.7:4 0h
24.3:2 11b
24.1:0 00b
BusyMode
Reserved
CTC_EN
Reserved
PRBS_VE
PRBS_EN
Reserved
PREEMP[1:0]
Reserved
DESCRIPTION
READ/WRITE
Gigabit Ethernet mode. When set to 1:
− Treats /K28.5/ followed by any non-K character as an IDLE sequence
(except when BMOD is asserted, chip treats /K28.5/D10.1/ as
described in the BMOD terminal description).
− Modifies IDLE to correct disparity by substituting /D5.6/ for /D15.2/ in
a /K28.5/Dx.y/ transmit IDLE pair.
This bit is logically ORed with the logic value of the GE_MOD terminal.
Read/write
If set to a logic 1, causes /K28.5/D10.1/ to treated as data and passed
through FIFO.
If set to a logic 0, causes sequence to be treated as IDLE. This bit is
ORed with the logic value of the BUSYEN terminal. This condition is
valid only when the GEMODE bit or GE_MOD terminal is at a logic 1.
Read/write
Read returns a 0; write is ignored.
Read-only
Global CTC enable
Read/write
Read returns 0s; write is ignored.
Read-only
Global enable for all internal RX PRBS verification. Results can be Read/write
observed in MDIO register 0x1F[15:8].
Enable global PRBS sequences. Results are observable on RDxx[9:0] Read/write
busses, and TX+/TX− SERDES outputs. Results can be observed on
the MDIO test register (0x1F[7:0]).
Read returns 0s; write is ignored.
Read-only
Global preemphasis controls
[00] No preemphasis
[01] Low preemphasis
[10] Mid preemphasis
[11] High preemphasis
Read/write
Read returns 0s, write is ignored.
Read/write
Table 20. Reserved (0x19) Bit Definitions
BIT(S)
25.15:0
DEFAULT
VALUE = 0x0000
0000h
NAME
Reserved
Read returns 0s.
DESCRIPTION
Table 21. Status Register 0 (0x1A) Bit Definitions
BIT(S)
26.15:0
DEFAULT
VALUE = 0x0000
0000h
NAME
Reserved
Read returns 0s.
DESCRIPTION
Table 22. Status Register 1 (0x1B) Bit Definitions
BIT(S)
27.15:0
DEFAULT
VALUE = 0x0000
0000h
NAME
Reserved
Read returns 0s.
DESCRIPTION
Table 23. Status Register 2 (0x1C) Bit Definitions
BIT(S)
28.15:0
DEFAULT
VALUE = 0x0000
0000h
NAME
Reserved
Read returns 0s.
DESCRIPTION
READ/WRITE
Read-only
READ/WRITE
Read-only
READ/WRITE
Read-only
READ/WRITE
Read-only
30
WWW.TI.COM