TLK2208B Datasheet, PDF (11/40 Pages) Texas Instruments – 8-PORT GIGABIT ETHERNET TRANCSEIVER

GE_MOD
PRBSEN
TLK2208B
8ĆPORT GIGABIT ETHERNET TRANSCEIVER
SLLS578D − AUGUST 2003 − REVISED SEPTEMBER 2006
C8
LVCMOS Gigabit Ethernet mode. When driven high, the chip:
input
1) Treats /K28.5/ followed by any valid data character as an IDLE sequence, except that when
BMOD is asserted, the chip treats /K28.5/D10.1/ as described in the BMOD terminal description.
2) Modifies IDLE to correct disparity by substituting /D5.6/ for /D16.2/ in a /K28.5/Dx.y/ transmit IDLE
pair.
The logic value of the GE_MOD terminal is ORed with GEMODE register 24.15.
C13
LVCMOS PRBS enable. When this terminal is asserted high, the pseudorandom bit stream generator and
input comparator circuits are inserted into the transmit and receive data paths on all channels,
with P/D respectively.
If this terminal is not used it can be tied to the GND reference.
TX+/TX– are transmitting 27−1 PRBS. RX+/RX– are comparing incoming data to an internally
generated 27−1 PRBS. Results of the RX comparison can be read from the MDIO.
Power and Reference Terminal Descriptions
SIGNAL
VDDQ
VDD
VDDA
GROUND
GNDA
GND
LOCATION
E9, E8, E7, E6, E5, F5, G5,
H5, J5, K5, L5, M5, N5, N6,
N7, N8, N9
E10, E11, E12, N10, N11,
N12
E13, F13, G13, H13, J13,
K13, L13, M13, N13
TYPE
Supply
Supply
Supply
DESCRIPTION
I/O supply voltage. 1.8 V ±0.2 V or 2.5 V ±0.2 V
Digital logic power. Provides power for all digital circuitry. Nominally 1.8 V
Analog power. VDDA provides a supply reference for the high-speed analog circuits,
receiver and transmitter. Nominally 1.8 V
E14, F14, G14, H14, J16,
J17, K14, L14, M14, N14
E4, F4, G4, H4, J4, K4, L4,
M4, N4, A14, B14, C14,
D14, P14, R14, T14, U14,
A17, B17, C17, D17, E17,
F17, G17, H17, K17, L17,
M17, N17, P17, R17, T17,
U17
Ground Analog ground. GNDA provides a ground reference for the high-speed analog circuits,
RX and TX.
Ground Digital logic ground. Provides a ground for the logic circuits and digital I/O buffers.
Reserved and NC Signals
SIGNAL
RSVD
LOCATION
F3, P7, P8, P10
NC
D4, D5, D6, D10, J14, J15,
K3, L3, M3, N3, P5, P6
TYPE
RSVD
DESCRIPTION
Reserved. Terminals available to TI test. These terminals should not be externally
connected.
NC. These signal terminals have no internal connection.
Terminal-to-Signal Map
TERMINAL
NUMBER
A1
A2
A3
A4
A5
A6
A7
A8
TERMINAL
FUNCTION
TDDC3
TDDC4
TDDC8
TDFE0
TDFE2
TDFE4
TDFE6
TDFE8
MULTIPLEXED CHANNEL MODE
Transmit bus channel D/C bit 3
Transmit bus channel D/C bit 4
Transmit bus channel D/C bit 8, K-bit
Transmit bus channel F/E bit 0
Transmit bus channel F/E bit 2
Transmit bus channel F/E bit 4
Transmit bus channel F/E bit 6
Transmit bus channel F/E bit 8, K-bit
NIBBLE INTERFACE SYNCHRONIZED AND
INDEPENDENT CHANNEL MODES
Transmit bus channel C bits 8, 3, K-bit
Transmit bus channel C bits 9, 4
Transmit bus channel D bits 8, 3, K-bit
Transmit bus channel E bits 5, 0
Transmit bus channel E bits 7, 2
Transmit bus channel E bits 9, 4
Transmit bus channel F bits 6, 1
Transmit bus channel F bits 8, 3 , K-bit
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