LSM303AH Datasheet, PDF (43/82 Pages) –

LSM303AH
Digital interfaces
Table 25. Transfer when master is receiving (reading) multiple bytes of data from slave
Master ST SAD+W
SUB
SR SAD+R
MAK
MAK
NMAK SP
Slave
SAK
SAK
SAK DATA
DAT
A
DATA
Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number
of bytes transferred per transfer is unlimited. Data is transferred with the Most Significant bit
(MSb) first. If a receiver can’t receive another complete byte of data until it has performed
some other function, it can hold the clock line SCL low to force the transmitter into a wait
state. Data transfer only continues when the receiver is ready for another byte and releases
the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to
receive because it is performing some real-time function) the data line must be left high by
the slave. The master can then abort the transfer. A low-to-high transition on the SDA line
while the SCL line is high is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In the presented communication format MAK is Master acknowledge and NMAK is No
Master Acknowledge.
Default address:
The accelerometer sensor slave address is 0011101b while magnetic sensor slave address
is 0011110b.
The slave addresses are completed with a Read/Write bit. If the bit was ‘1’ (Read), a
repeated START (SR) condition must be issued after the two sub-address bytes. If the bit is
‘0’ (Write) the master will transmit to the slave with direction unchanged. Table 26 and
Table 27 explain how the SAD+Read/Write bit patterns are composed, listing all the
possible configurations.
Linear acceleration sensor: the default (factory setting) 7-bit slave address is
0011101b.
Command
Read
Write
Table 26. SAD+Read/Write patterns
SAD[6:0]
R/W
SAD+R/W
0011101
1
00111011
0011101
0
00111010
Magnetic field sensor: the default (factory setting) 7-bit slave address is 0011110b.
Command
Read
Write
Table 27. SAD + Read/Write patterns
SAD[6:0]
R/W
SAD + R/W
0011110
0011110
1
00111101 (3Dh)
0
00111100 (3Ch)
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