LSM303AH Datasheet, PDF (16/82 Pages) –

Module specifications
LSM303AH
2.4
Communication interface characteristics
2.4.1
SPI - serial peripheral interface
Subject to general operating conditions for Vdd and Top.
Symbol
t_c(SPC)
f_c(SPC)
t_su(CS)
t_h(CS)
t_su(SI)
t_h(SI)
t_v(SO)
t_h(SO)
t_dis(SO)
Table 6. SPI slave timing values
Parameter
Value ⁽¹⁾
Min
Max
SPI clock cycle
100
SPI clock frequency
10
CS setup time
5
CS hold time
20
SDI input setup time
5
SDI input hold time
15
SDO valid output time
50
SDO output hold time
5
SDO output disable time
50
Figure 3. SPI slave timing diagram
Unit
ns
MHz
ns
&6
63&
6',
6'2
W_VX&6
WF63&
WVX6,
WK6,
06%,1
W_Y62
06%287
W_K62
W_K&6
/6%,1
WGLV62
/6%287
Note:
Values are guaranteed at 10 MHz clock frequency for SPI with 3 wires, based on
characterization results, not tested in production.
Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output
ports.
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