LSM303AH Datasheet, PDF (32/82 Pages) –

Functionality
LSM303AH
4.4
4.4.1
FIFO
The FIFO buffer applies only to the accelerometer. The LSM303AH embeds 256 slots of
14-bit data FIFO for each of the three output channels, X, Y and Z of the acceleration
module. This allows consistent power saving for the system, since the host processor does
not need to continuously poll data from the sensor, but it can wake up only when needed
and burst the significant data out from the FIFO.
The internal FIFO allows collecting 256 samples (14-bit size data) for each axis or storing
the output of the module computation up to 768 samples (14-bit size data).
This buffer can work according to the following 5 different modes:
 Bypass mode
 FIFO mode
 Continuous-to-FIFO
 Bypass-to-Continuous
 Continuous
Each mode is selected by the FIFO_MODE bits in the FIFO_CTRL_A (25h) register.
Programmable FIFO threshold status, FIFO overrun events and the number of unread
samples stored are available in the FIFO_SRC_A (2Fh) and FIFO_SAMPLES_A (30h)
registers and can be set to generate dedicated interrupts on the INT1 and INT2 pins using
the CTRL4_A (23h) and CTRL5_A (24h) registers.
FIFO_SRC_A (2Fh) (FIFO_FTH) goes to '1' when the number of unread samples
FIFO_SRC_A (2Fh) and FIFO_SAMPLES_A (30h) (Diff[8:0]) is greater than or equal to FTH
[7:0] in FIFO_THS_A (2Eh).
If FTH [7:0] is equal to '0', FIFO_SRC_A (2Fh) (FIFO_FTH) goes to '0'.
FIFO_SRC_A (2Fh) (FIFO_OVRN) is equal to '1' if a FIFO slot is overwritten.
FIFO_SRC_A (2Fh) and FIFO_SAMPLES_A (30h) (Diff[8:0]) contain stored data levels of
unread samples. When Diff[8:0] is equal to '000000000', FIFO is empty. When Diff[8:0] is
equal to '100000000', FIFO is full and the unread samples are 256.
To guarantee the correct acquisition of data during the switching into and out of FIFO mode,
the first sample acquired must be discarded.
When the FIFO threshold status flag is '0'-logic, FIFO filling is lower than the threshold level
and when '1'-logic, FIFO filling is equal to or higher than the threshold level.
Bypass mode
In Bypass mode (FIFO_CTRL_A (25h) (FMODE [2:0])= 000), the FIFO is not operational, no
data is collected in FIFO memory, and it remains empty with the only actual sample
available in the output registers.
Bypass mode is also used to reset the FIFO when in FIFO mode.
For each channel only the first address is used. When new data is available, the old data is
overwritten.
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