M36W832TE Datasheet, PDF(38/64 Page) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 8 Mbit 512Kb x16 SRAM, Multiple Memory Product

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M36W832TE Datasheet, PDF (38/64 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 8 Mbit 512Kb x16 SRAM, Multiple Memory Product

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M36W832TE, M36W832BE

Figure 18. SRAM Write AC Waveforms, WS Controlled, GS High during Write

A0-A18

E1S

tAVAV

VALID

tAVWH

tE1LWH

tWHAX

E2S

tE2HWH

tAVWL

tWLWH

DQ0-DQ15

tGHQZ

Note 2

tDVWH

tWHDZ

INPUT VALID

Note: 1. DQ0-DQ15 are high impedance if GS = VIH.

2. If E1S or E2s and WS are deasserted at the same time, DQ0-DQ15 remain high impedance.

Figure 19. SRAM Write AC Waveforms, WS Controlled with GS Low

A0-A18

E1S

tAVAV

VALID

tAVWH

tE1LWH

tE2HWH

tWHAX

AI07967

E2S

DQ0-DQ15

tAVWL

tWLQZ

Note 3

tWLWH

tDVWH

tWHQX

tWHDZ

INPUT VALID

Note: 1. If E1S, E2S and WS are deasserted at the same time, DQ0-DQ15 remain high impedance.

2. The minimum write cycle time (tAVAV) is the sum of tWLQZ and tDVWH.

3. During this period, the I/O pins are in output mode and input signals should not be applied.

AI07968

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