M36W832TE Datasheet, PDF (24/64 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 8 Mbit 512Kb x16 SRAM, Multiple Memory Product

M36W832TE, M36W832BE
gram/Erase Controller Status bit is High (Program/
Erase Controller inactive). Bit 2 is set within 5µs of
the Program/Erase Suspend command being is-
sued therefore the memory may still complete the
operation rather than entering the Suspend mode.
When a Program/Erase Resume command is is-
sued the Program Suspend Status bit returns Low.
Block Protection Status (Bit 1). The Block Pro-
tection Status bit can be used to identify if a Pro-
gram or Erase operation has tried to modify the
contents of a locked block.
When the Block Protection Status bit is High (set
to ‘1’), a Program or Erase operation has been at-
tempted on a locked block.
Once set High, the Block Protection Status bit can
only be reset Low by a Clear Status Register com-
mand or a hardware reset. If set High it should be
reset before a new command is issued, otherwise
the new command will appear to fail.
Reserved (Bit 0). Bit 0 of the Status Register is
reserved. Its value must be masked.
Note: Refer to Appendix C, Flowcharts and
Pseudo Codes, for using the Status Register.
Table 11. Flash Status Register Bits
Bit
Name
7
P/E.C. Status
6
Erase Suspend Status
5
Erase Status
4
Program Status
3
V_PPF Status
2
Program Suspend Status
1
Block Protection Status
0
Reserved
Note: Logic level ’1’ is High, ’0’ is Low.
Logic Level
’1’
’0’
’1’
’0’
’1’
’0’
’1’
’0’
’1’
’0’
’1’
’0’
’1’
’0’
Definition
Ready
Busy
Suspended
In progress or Completed
Erase Error
Erase Success
Program Error
Program Success
V_PPF Invalid, Abort
V_PPF OK
Suspended
In Progress or Completed
Program/Erase on protected Block, Abort
No operation to protected blocks
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