SI5345-44-42 Datasheet, PDF (8/62 Pages) Silicon Laboratories – 10-CHANNEL

Si5345/44/42
Table 4. Control Input Pin Specifications
(V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, V_DDS = 3.3 V ±5%, 1.8 V ±5%, T_A = –40 to 85 °C)
Parameter
Symbol Test Condition
Min
Typ
Max
Unit
Si5345 Control Input Pins (I2C_SEL, IN_SEL[1:0], RST, OE, A1, SCLK, A0/CS, FINC, FDEC, SDA/SDIO)
Input Voltage
V_IL
—
— 0.3 x V_DDIO*
V
V_IH
0.7 x V_DDIO* —
—
V
Input Capacitance
C_IN
—
2
—
pF
Input Resistance
R_IN
—
20
—
k
Minimum Pulse Width
PW RST, FINC and
50
—
—
ns
FDEC
Update Rate
T_UR FINC and FDEC
1
—
—
µs
Si5344/42 Control Input Pins (I2C_SEL, IN_SEL[1:0], RST, OE, A1, SCLK, A0/CS, SDA/SDIO)
Input Voltage
V_IL
—
— 0.3 x V_DDIO*
V
V_IH
0.7 x V_DDIO* —
—
V
Input Capacitance
C_IN
—
2
—
pF
Input Resistance
R_IN
—
20
—
k
Minimum Pulse Width
PW
RST
50
—
—
ns
*Note: V_DDIO is determined by the IO_VDD_SEL bit. It is selectable as V_DDA or V_DD. See the Si5345/44/42 Family Reference
Manual for more details on the proper register settings.
8
Rev. 1.0