SI53320-28 Datasheet, PDF (6/51 Pages) Silicon Laboratories – Output Enable option

Si53320-28 Data Sheet
Functional Description
2.2 LVCMOS Input Termination (Si53326/28 Only)
The table below summarizes the various ac- and dc-coupling options supported by the LVCMOS device, and the figure shows the rec-
ommended input clock termination.
Note: 1.8 V LVCMOS inputs are not supported for Si53326/28.
1.8 V
2.5/3.3 V
Table 2.2. LVCMOS Input Clock Options
AC-Coupled
No
Yes
LVCMOS
DC-Coupled
No
Yes
VDD = 3.3 V or 2.5 V
CMOS
Driver
Rs
DC-Coupled
50
VDD
Si53326/28
CLKx
NC
VDD
VDD = 3.3 V or 2.5 V
CMOS
Driver
Rs
1k
AC-Coupled
50
VDD
Si53326/28
CLKx
NC
1k
VBIAS = VDD/2
Note:
Value for Rs should be chosen so that the total
source impedance matches the characteristic
impedance of the PCB trace.
Figure 2.4. Recommended Input Clock Termination (Si53326/28)
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