C8051F300 Datasheet, PDF (59/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
Table 8.1. CIP-51 Instruction Set Summary (Continued)
Mnemonic
Description
Bytes
MOVC A, @A+PC
Move code byte relative PC to A
1
MOVX A, @Ri
Move external data (8-bit address) to A
1
MOVX @Ri, A
Move A to external data (8-bit address)
1
MOVX A, @DPTR
Move external data (16-bit address) to A
1
MOVX @DPTR, A
Move A to external data (16-bit address)
1
PUSH direct
Push direct byte onto stack
2
POP direct
Pop direct byte from stack
2
XCH A, Rn
Exchange Register with A
1
XCH A, direct
Exchange direct byte with A
2
XCH A, @Ri
Exchange indirect RAM with A
1
XCHD A, @Ri
Exchange low nibble of indirect RAM with A
1
Boolean Manipulation
CLR C
Clear Carry
1
CLR bit
Clear direct bit
2
SETB C
Set Carry
1
SETB bit
Set direct bit
2
CPL C
Complement Carry
1
CPL bit
Complement direct bit
2
ANL C, bit
AND direct bit to Carry
2
ANL C, /bit
AND complement of direct bit to Carry
2
ORL C, bit
OR direct bit to carry
2
ORL C, /bit
OR complement of direct bit to Carry
2
MOV C, bit
Move direct bit to Carry
2
MOV bit, C
Move Carry to direct bit
2
JC rel
Jump if Carry is set
2
JNC rel
Jump if Carry is not set
2
JB bit, rel
Jump if direct bit is set
3
JNB bit, rel
Jump if direct bit is not set
3
JBC bit, rel
Jump if direct bit is set and clear bit
3
Program Branching
ACALL addr11
Absolute subroutine call
2
LCALL addr16
Long subroutine call
3
RET
Return from subroutine
1
RETI
Return from interrupt
1
AJMP addr11
Absolute jump
2
LJMP addr16
Long jump
3
SJMP rel
Short jump (relative address)
2
JMP @A+DPTR
Jump indirect relative to DPTR
1
JZ rel
Jump if A equals zero
2
Clock
Cycles
3
3
3
3
3
2
2
1
2
2
2
1
2
1
2
1
2
2
2
2
2
2
2
2/3
2/3
3/4
3/4
3/4
3
4
5
5
3
4
3
3
2/3
Rev. 2.8
59