C8051F300 Datasheet, PDF (22/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
1.7. 8-Bit Analog to Digital Converter (C8051F300/2 Only)
The C8051F300/2 includes an on-chip 8-bit SAR ADC with a 10-channel differential input multiplexer and
programmable gain amplifier. With a maximum throughput of 500 ksps, the ADC offers true 8-bit accuracy
with an INL of ±1LSB. The ADC system includes a configurable analog multiplexer that selects both posi-
tive and negative ADC inputs. Each Port pin is available as an ADC input; additionally, the on-chip Temper-
ature Sensor output and the power supply voltage (V_DD) are available as ADC inputs. User firmware may
shut down the ADC to save power.
The integrated programmable gain amplifier (PGA) amplifies the ADC input by 0.5, 1, 2, or 4 as defined by
user software. The gain stage is especially useful when different ADC input channels have widely varied
input voltage signals, or when it is necessary to "zoom in" on a signal with a large DC offset.
Conversions can be started in five ways: a software command, an overflow of Timer 0, 1, or 2, or an exter-
nal convert start signal. This flexibility allows the start of conversion to be triggered by software events, a
periodic signal (timer overflows), or external HW signals. Conversion completions are indicated by a status
bit and an interrupt (if enabled). The resulting 8-bit data word is latched into an SFR upon completion of a
conversion.
Window compare registers for the ADC data can be configured to interrupt the controller when ADC data is
either within or outside of a specified range. The ADC can monitor a key voltage continuously in back-
ground mode, but not interrupt the controller unless the converted data is within/outside the specified
range.
Temp
Sensor
Analog Multiplexer
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
10-to-1
AMUX
VDD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
DGND
9-to-1
AMUX
Configuration, Control, and Data Registers
Programmable Gain
Amplifier
VDD
X
+
-
Start
Conversion
8-Bit
SAR
8
ADC
Software Write
T0 Overflow
TMR2 Overflow
T1 Overflow
External
Convert Start
ADC Data
Register
End of
Conversion
Interrupt
Window Compare
Logic
Window
Compare
Interrupt
Figure 1.10. 8-Bit ADC Block Diagram
22
Rev. 2.8