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C8051F300 Datasheet, PDF (174/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family | |||
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C8051F300/1/2/3/4/5
DOCUMENT CHANGE LIST
Revision 2.3 to Revision 2.4
⢠Removed preliminary tag.
⢠Changed all references of MLP package to QFN package.
⢠Pinout chapter: Figure 4.3: Changed title to âTypical QFN-11 Solder Paste Mask.â
⢠ADC chapter: Added reference to minimum tracking time in the Tracking Modes section.
⢠Comparators chapter: SFR Definition 7.3, CPT0MD: Updated the register reset value and the CP0
response time table.
⢠CIP51 chapter: Updated IDLE mode and recommendations.
⢠CIP51 chapter: Updated Interrupt behavior and EA recommendations.
⢠CIP51 chapter: SFR Definition 8.4, PSW: Clarified OV flag description.
⢠CIP51 chapter: SFR Definition 8.8, IP register: Changed âdefault priority orderâ to âlow priorityâ for low
priority descriptions.
⢠Reset Sources chapter: Clarified description of VDD Ramp Time.
⢠Reset Sources chapter: Table 9.2, âReset Electrical Characteristicsâ: Added VDD Ramp Time and
changed âVDD POR Thresholdâ to âVDD Monitor Threshold.â
⢠FLASH Memory chapter: Clarified descriptions of FLASH security features.
⢠Oscillators chapter: Table 11.1 âInternal Oscillator Electrical Characteristicsâ: Added Calibrated Internal
Oscillator specification over a smaller temperature range.
⢠Oscillators chapter: Clarified external crystal initialization steps and added a specific 32.768 kHz crys-
tal example.
⢠Oscillators chapter: Clarified external capacitor example.
⢠SMBus chapter: Figure 14.5, SMB0CF register: Added a description of the behavior of Timer 3 in split
mode if SMBTOE is set.
⢠Timers chapter: Changed references to âTL2â and âTH2â to âTMR2Lâ and âTMR2H,â respectively.
Revision 2.4 to Revision 2.5
⢠Fixed variables and applied formatting changes.
Revision 2.5 to Revision 2.6
⢠Updated Table 1.1 Product Selection Guide to include Lead-free information.
Revision 2.6 to Revision 2.7
⢠Removed non-RoHS compliant devices from Table 1.1, âProduct Selection Guide,â on page 14.
⢠Added MIN and MAX specifications for ADC Offset Error and ADC Full Scale Error to Table 5.1, âADC0
Electrical Characteristics,â on page 45.
⢠Improved power supply specifications in Table 3.1, âGlobal Electrical Characteristics,â on page 32.
⢠Added Section â10.4. Flash Write and Erase Guidelinesâ on page 92.
⢠Fixed minor typographical errors throughout.
Revision 2.7 to Revision 2.8
⢠Updated block diagram on page 1.
174
Rev. 2.8
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