C8051F300 Datasheet, PDF (106/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
SFR Definition 12.3. XBR2: Port I/O Crossbar Register 2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
WEAKPUD XBARE
—
—
—
T1E
T0E
ECIE 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xE3
Bit7:
Bit6:
Bits5–3:
Bit2:
Bit1:
Bit0:
WEAKPUD: Port I/O Weak Pull-up Disable.
0: Weak Pull-ups enabled (except for Ports whose I/O are configured as push-pull).
1: Weak Pull-ups disabled.
XBARE: Crossbar Enable.
0: Crossbar disabled.
1: Crossbar enabled.
UNUSED: Read = 000b. Write = don’t care.
T1E: T1 Enable.
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
T0E: T0 Enable.
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
ECIE: PCA0 Counter Input Enable.
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
12.3. General Purpose Port I/O
Port pins that remain unassigned by the Crossbar and are not used by analog peripherals can be used for
general purpose I/O. Port0 is accessed through a corresponding special function register (SFR) that is
both byte addressable and bit addressable. When writing to a Port, the value written to the SFR is latched
to maintain the output data value at each pin. When reading, the logic levels of the Port's input pins are
returned regardless of the XBRn settings (i.e., even when the pin is assigned to another signal by the
Crossbar, the Port register can always read its corresponding Port I/O pin). The exception to this is the
execution of the read-modify-write instructions. The read-modify-write instructions when operating on a
Port SFR are the following: ANL, ORL, XRL, JBC, CPL, INC, DEC, DJNZ and MOV, CLR or SET, when the
destination is an individual bit in a Port SFR. For these instructions, the value of the register (not the pin) is
read, modified, and written back to the SFR.
106
Rev. 2.8