C8051F300 Datasheet, PDF (164/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
Table 16.3. Watchdog Timer Timeout Intervals¹
System Clock (Hz)
PCA0CPL2 Timeout Interval (ms)
24,500,000
255
32.1
24,500,000
128
16.2
24,500,000
32
4.1
18,432,000
255
42.7
18,432,000
128
21.5
18,432,000
32
5.5
11,059,200
255
71.1
11,059,200
128
35.8
11,059,200
3,062,500²
3,062,500²
3,062,500²
32
9.2
255
257
128
129.5
32
33.1
32,000
255
24576
32,000
128
12384
32,000
32
3168
Notes:
1. Assumes SYSCLK / 12 as the PCA clock source, and a PCA0L value of 0x00
at the update time.
2. Internal oscillator reset frequency for devices with a calibrated internal
oscillator. The reset system clock for devices with an uncalibrated internal
oscillator will vary.
164
Rev. 2.8