C8051F300 Datasheet, PDF (4/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
8.3.4. Interrupt Latency ...................................................................................... 71
8.3.5. Interrupt Register Descriptions................................................................. 73
8.4. Power Management Modes .............................................................................. 78
8.4.1. Idle Mode.................................................................................................. 78
8.4.2. Stop Mode ................................................................................................ 79
9. Reset Sources......................................................................................................... 81
9.1. Power-On Reset ............................................................................................... 82
9.2. Power-Fail Reset/VDD Monitor......................................................................... 82
9.3. External Reset .................................................................................................. 83
9.4. Missing Clock Detector Reset........................................................................... 83
9.5. Comparator0 Reset........................................................................................... 83
9.6. PCA Watchdog Timer Reset............................................................................. 83
9.7. Flash Error Reset.............................................................................................. 84
9.8. Software Reset ................................................................................................. 84
10. Flash Memory ......................................................................................................... 87
10.1.Programming The Flash Memory ..................................................................... 87
10.1.1.Flash Lock and Key Functions ................................................................. 87
10.1.2.Flash Erase Procedure ............................................................................ 87
10.1.3.Flash Write Procedure ............................................................................. 88
10.2.Non-Volatile Data Storage................................................................................ 88
10.3.Security Options ............................................................................................... 88
10.4.Flash Write and Erase Guidelines .................................................................... 92
10.4.1.V_DD Maintenance and the V_DD monitor ................................................... 92
10.4.2.PSWE Maintenance ................................................................................. 92
10.4.3.System Clock ........................................................................................... 93
11. Oscillators ............................................................................................................... 95
11.1.Programmable Internal Oscillator ..................................................................... 95
11.2.External Oscillator Drive Circuit........................................................................ 97
11.3.System Clock Selection.................................................................................... 97
11.4.External Crystal Example ................................................................................. 99
11.5.External RC Example ..................................................................................... 100
11.6.External Capacitor Example ........................................................................... 100
12. Port Input/Output.................................................................................................. 101
12.1.Priority Crossbar Decoder .............................................................................. 102
12.2.Port I/O Initialization ....................................................................................... 104
12.3.General Purpose Port I/O ............................................................................... 106
13. SMBus ................................................................................................................... 109
13.1.Supporting Documents ................................................................................... 110
13.2.SMBus Configuration...................................................................................... 110
13.3.SMBus Operation ........................................................................................... 110
13.3.1.Arbitration............................................................................................... 111
13.3.2.Clock Low Extension.............................................................................. 112
13.3.3.SCL Low Timeout................................................................................... 112
13.3.4.SCL High (SMBus Free) Timeout .......................................................... 112
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Rev. 2.8