C8051F300 Datasheet, PDF (1/176 Pages) List of Unclassifed Manufacturers – Mixed Signal ISP Flash MCU Family

Analog Peripherals
- 8-Bit ADC ('F300/2 only)
• Up to 500 ksps
• Up to 8 external inputs
• Programmable amplifier gains of 4, 2, 1, & 0.5
• VREF from external pin or V_DD
• Built-in temperature sensor
• External conversion start input
- Comparator
• Programmable hysteresis and response time
• Configurable as interrupt or reset source
• Low current (<0.5 µA)
On-chip Debug
- On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug (no emulator
required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Complete development kit
Supply Voltage 2.7 to 3.6 V
- Typical operating current: 6.6 mA @ 25 MHz;
14 µA @ 32 kHz
- Typical stop mode current: 0.1 µA
- Temperature range: –40 to +85 °C
C8051F300/1/2/3/4/5
Mixed Signal ISP Flash MCU Family
High Speed 8051 µc Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 256 bytes internal data RAM
- Up to 8 kB (‘F300/1/2/3), 4 kB (‘F304), or 2 kB
(‘F305) Flash; 512 bytes are reserved in the 8 kB
devices
Digital Peripherals
- 8 Port I/O; All 5 V tolerant with high sink current
- Hardware enhanced UART and SMBus™ serial
ports
- Three general-purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with three
capture/compare modules
- Real time clock mode using PCA or timer and
external clock source
Clock Sources
- Internal oscillator: 24.5 MHz with ±2% accuracy
supports UART operation
- External oscillator: Crystal, RC, C, or clock (1 or 2
pin modes)
- Can switch between clock sources on-the-fly; Useful
in power saving modes
11-Pin Quad Flat No-Lead (QFN) RoHS Package
- 3 x 3 mm PWB footprint
ANALOG
PERIPHERALS
A
8-bit
M
PGA
500 ksps
U
X
ADC
C8051F300/2 only
TEMP
+
SENSOR
-
VOLTAGE COMPARATOR
DIGITAL I/O
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
PROGRAMMABLE PRECISION INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
8/4/2 kBytes
ISP Flash
12
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
256 B SRAM
POR WDT
Rev. 2.8 6/06
Copyright © 2006 by Silicon Laboratories
C8051F30x