EFM8SB1 Datasheet, PDF (19/55 Pages) Silicon Laboratories – The EFM8SB1 highlighted features are listed below

Parameter
Negative Hysterisis
Mode 2 (CPMD = 10)
Positive Hysteresis
Mode 3 (CPMD = 11)
Negative Hysteresis
Mode 3 (CPMD = 11)
Input Range (CP+ or CP–)
Input Pin Capacitance
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Input Offset Voltage
Input Offset Tempco
Symbol Test Condition
HYS_CP-
CPHYN = 00
CPHYN = 01
CPHYN = 10
CPHYN = 11
HYS_CP+
CPHYP = 00
CPHYP = 01
CPHYP = 10
CPHYP = 11
HYS_CP-
CPHYN = 00
CPHYN = 01
CPHYN = 10
CPHYN = 11
V_IN
C_CP
CMRR_CP
PSRR_CP
V_OFF
T_A = 25 °C
TC_OFF
Min
—
—
—
—
—
—
—
—
—
—
—
—
-0.25
—
—
—
-10
—
Table 4.13. Programmable Current Reference (IREF0)
EFM8SB1 Data Sheet
Electrical Specifications
Typ
Max
Unit
-0.6
—
mV
–4.5
—
mV
–9
—
mV
–18
—
mV
1.5
—
mV
4
—
mV
8
—
mV
16
—
mV
-1.5
—
mV
–4
—
mV
–8
—
mV
–16
—
mV
—
V_DD+0.25
V
12
—
pF
70
—
dB
72
—
dB
0
10
mV
3.5
—
µV/°C
Parameter
Static Performance
Resolution
Output Compliance Range
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Full Scale Error
Absolute Current Error
Dynamic Performance
Symbol Conditions
Min
Typ
Max
Units
N_bits
V_IOUT
Low Power Mode, Source
0
High Current Mode, Source
0
Low Power Mode, Sink
0.3
High Current Mode, Sink
0.8
INL
—
DNL
—
E_OFF
—
E_FS
Low Power Mode, Source
—
High Current Mode, Source
—
Low Power Mode, Sink
—
High Current Mode, Sink
—
E_ABS
Low Power Mode Sourcing 20 µA
—
6
bits
—
V_DD – 0.4
V
—
V_DD – 0.8
V
—
V_DD
V
—
V_DD
V
<±0.2
±1.0
LSB
<±0.2
±1.0
LSB
<±0.1
±0.5
LSB
—
±5
%
—
±6
%
—
±8
%
—
±8
%
<±1
±3
%
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