EFM8SB1 Datasheet, PDF (17/55 Pages) Silicon Laboratories – The EFM8SB1 highlighted features are listed below

EFM8SB1 Data Sheet
Electrical Specifications
Parameter
Symbol Test Condition
Min
Typ
Max
Power Supply Rejection Ratio
PSRR_ADC Internal High Speed VREF
External VREF
—
67
—
—
74
—
DC Performance
Integral Nonlinearity
INL
12 Bit Mode
—
±1
±1.5
10 Bit Mode
—
±0.5
±1
Differential Nonlinearity (Guaran- DNL
teed Monotonic)
12 Bit Mode
10 Bit Mode
—
±0.8
±1
—
±0.5
±1
Offset Error
E_OFF
12 Bit Mode, VREF = 1.65 V
10 Bit Mode, VREF = 1.65 V
–3
0
3
–2
0
2
Offset Temperature Coefficient
TC_OFF
—
0.004
—
Slope Error
E_M
12 Bit Mode
10 Bit Mode
—
±0.02
±0.1
—
±0.06
±0.24
Dynamic Performance 10 kHz Sine Wave Input 1dB below full scale, Max throughput
Signal-to-Noise
SNR
12 Bit Mode
62
65
—
10 Bit Mode
54
58
—
Signal-to-Noise Plus Distortion
SNDR
12 Bit Mode
62
65
—
10 Bit Mode
54
58
—
Total Harmonic Distortion (Up to
5th Harmonic)
THD
12 Bit Mode
10 Bit Mode
—
-76
—
—
-73
—
Spurious-Free Dynamic Range
SFDR
12 Bit Mode
—
82
—
10 Bit Mode
—
75
—
Note:
1. Absolute input pin voltage is limited by the V_DD supply.
2. INL and DNL specifications for 12-bit mode do not include the first or last four ADC codes.
3. The maximum code in 12-bit mode is 0xFFFC. The Full Scale Error is referenced from the maximum code.
Unit
dB
dB
LSB
LSB
LSB
LSB
LSB
LSB
LSB/°C
%
%
dB
dB
dB
dB
dB
dB
dB
dB
Table 4.10. Voltage Reference
Parameter
Internal Fast Settling Reference
Output Voltage
Temperature Coefficient
Turn-on Time
Power Supply Rejection
External Reference
Input Voltage
Input Current
Symbol Test Condition
V_REFFS
TC_REFFS
t_REFFS
PSRR_REF
FS
V_EXTREF
I_EXTREF
Sample Rate = 300 ksps; VREF =
3.0 V
Min
1.62
—
—
—
1
—
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Typ
1.65
50
—
400
—
5.25
Max
Unit
1.68
V
—
ppm/°C
1.5
µs
—
ppm/V
V_DD
V
—
µA
Rev. 1.2 | 16