RX113_15 Datasheet, PDF (92/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
5. Electrical Characteristics
SSISCKn
(input or output)
SSIWSn, SSIDATAn
(input)
SSIWSn, SSIDATAn
(output)
t_SR
t_HTR
t_DTR
Figure 5.52 Transmission/Reception Timing (Synchronized with SSISCKn Falling Edge)
SSIWSn (input)
SSIDATAn (output)
t_DTRW
Note. Timing to output the MSB bit during slave transmission from SSIWSn
when DEL = 1 and SDTA = 0 or DEL = 1, SDTA = 1, and SWL[2:0] = DWL[2:0]
Figure 5.53 SSIDATA Output Delay After SSIWSn Changing Edge
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 92 of 121