RX113_15 Datasheet, PDF (14/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
1. Overview
RX113 Group
PTLG0100JA-A
(100-pin TFLGA)
(Upper perspective view)
A
B
C
D
E
F
G
H
J
K
10 PE0 PE3 PE4 PA0 VSS VCC PB3 PB7 PC2 PC3 10
9 PE7 PE1 PE5 PA1 PA3 PA6 PB1 PB6 PC4 PC5 9
8 PE6 PE2 PD2 PF7 PA5 PB0 PB2 PC1 PC7 PC6 8
7 PD3 PD4 PD1 PF6 PA4 PA7 PB5 PC0 P55 P54 7
6 P92 PD0 P91 P46 PA2 PB4 P50 P51 P52 P53 6
5
P44
P90
P42/
VREFL
P43
P40
P56
P10
P11
VSS_
USB
USB0_
DP
5
4
AVSS0
PJ7/
VREFL0
P41/
VREFH
PJ0
P20
P27
MD/
FINED
P13
VCC_
USB
USB0_
DM
4
3
AVCC0
PJ2
PJ6/
VREFH0
P21
P26 RES# P12
P15
P32
P16
3
2
P07
P04
P24
P23
P31/
CAPL
P35/
NMI
P14 ^EXTAL P17 VCC
2
1
P02
P25
PJ3
P22
P30/
CAPH
XCOUT
XCIN/
PH7
XTAL
VCL
VSS
1
A
B
C
D
E
F
G
H
J
K
Note: This figure indicates the power supply pins and I/O ports.
For the pin configuration, see the table “List of Pins and Pin Functions (100-Pin TFLGA)”.
Figure 1.4
Pin Assignments of the 100-Pin TFLGA
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 14 of 121