RX113_15 Datasheet, PDF (57/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
5. Electrical Characteristics
Item
Symbol
Typ
*⁴
Max
Unit
Test
Conditions
Supply Low-speed
current*¹ operating
Normal
operating
No peripheral
operation*⁸
ICLK = 32.768 kHz I_CC
4.3 — μA
mode
mode
All peripheral operation: ICLK = 32.768 kHz
15.0 —
Normal*^9, *¹⁰
All peripheral operation: ICLK = 32.768kHz
Max.*^9, *¹⁰
— 62
Sleep mode No peripheral
operation*⁸
ICLK = 32.768 kHz
2.3 —
All peripheral operation: ICLK = 32.768 kHz
Normal*⁹
8.6 —
Deep sleep No peripheral
mode
operation*⁸
ICLK = 32.768 kHz
1.7 —
All peripheral operation: ICLK = 32.768 kHz
Normal*⁹
7.0 —
Note 1. Supply current values do not include output charge/discharge current from all pins. The values apply when internal pull-up
MOSs are in the off state.
Note 2. Clock supply to the peripheral functions is stopped. This does not include BGO operation. The clock source is PLL. FCLK and
PCLK are set to divided by 64.
Note 3. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is PLL. FCLK and PCLK
are set to the same frequency as ICLK.
Note 4. Values when VCC = 3.3 V.
Note 5. This is the increase for programming or erasure of the ROM or E2 DataFlash during program execution.
Note 6. Clock supply to the peripheral functions is stopped. The clock source is PLL when ICLK = 12 MHz, and HOCO otherwise. FCLK
and PCLK are set to divided by 64.
Note 7. Clocks are supplied to the peripheral functions. The clock source is PLL when ICLK = 12 MHz, and HOCO otherwise. FCLK and
PCLK are set to the same frequency as ICLK.
Note 8. Clock supply to the peripheral functions is stopped. The clock source is the sub-clock oscillator. FCLK and PCLK are set to
divided by 64.
Note 9. Clocks are supplied to the peripheral functions. The clock source is the sub-clock oscillator. FCLK and PCLK are set to the
same frequency as ICLK.
Note 10. Values when the MSTPCRA.MSTPA17 bit (12-bit A/D converter module stop bit) is set to “transition to the module stop state is
made”.
25
T_a = 85/105°C, ICLK = 32 MHz^*2
20
15
T_a = 25°C, ICLK = 32 MHz^*1
T_a = 85/105°C, ICLK = 16 MHz^*2
10
T_a = 85/105°C, ICLK = 8 MHz^*2
T_a = 25°C, ICLK = 16 MHz^*1
5
T_a = 25°C, ICLK = 8 MHz^*1
Figure 5.1
0
1.5
2.0
2.5
3.0
3.5
4.0
VCC (V)
Note 1. All peripheral operation is normal. This does not include BGO operation. Average value of the
tested middle samples during product evaluation.
Note 2. All peripheral operation is maximum. This does not include BGO operation. Average value of the
tested upper-limit samples during product evaluation.
Voltage Dependency in High-Speed Operating Mode (Reference Data)
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 57 of 121