RX113_15 Datasheet, PDF (113/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
5. Electrical Characteristics
5.13 ROM (Flash Memory for Code Storage) Characteristics
Table 5.60 ROM (Flash Memory for Code Storage) Characteristics (1)
Item
Reprogramming/erasure cycle*¹
Data hold time After 1000 times of N_PEC
Symbol
N_PEC
t_DRP
Min.
1000
20*^2, *³
Typ.
Max.
Unit
Conditions
—
—
Times
—
—
Year T_a = +85°C
Note 1. Definition of reprogram/erase cycle: The reprogram/erase cycle is the number of erasing for each block. When the reprogram/
erase cycle is n times (n = 1000), erasing can be performed n times for each block. For instance, when 4-byte programming is
performed 256 times for different addresses in 1-Kbyte block and then the entire block is erased, the reprogram/erase cycle is
counted as one. However, programming the same address for several times as one erasing is not enabled (overwriting is
prohibited).
Note 2. Characteristic when using the flash memory programmer.
Note 3. This result is obtained from reliability testing.
Table 5.61 ROM (Flash Memory for Code Storage) Characteristics (2)
High-speed operating mode Conditions: VCC = AVCC0 = VCC_USB = 2.7 to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +105°C
Item
Programming time
4-byte
Erasure time
1-Kbyte
Blank check time
4-byte
1-Kbyte
Erase operation forcible stop time
Start-up area switching setting time
Access window time
ROM mode transition wait time 1
ROM mode transition wait time 2
Symbol
t_P4
t_E1K
t_BC4
t_BC1K
t_SED
t_SAS
t_AWS
t_DIS
t_MS
FCLK = 1 MHz
Min.
Typ.
—
103
—
8.23
—
—
—
—
—
—
—
12.6
—
12.6
2
—
5
—
Max.
931
267
48
1.58
21.6
543
543
—
—
FCLK = 32 MHz
Unit
Min.
Typ. Max.
—
52
489
μs
—
5.48
214
ms
—
—
15.9
μs
—
—
0.127 ms
—
—
12.8
μs
—
6.16
432
ms
—
6.16
432
ms
2
—
—
μs
5
—
—
μs
Note:
Note:
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Table 5.62 ROM (Flash Memory for Code Storage) Characteristics (3)
Middle-speed operating mode Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +105°C
FCLK = 1 MHz
FCLK = 8 MHz
Item
Symbol
Unit
Min.
Typ. Max.
Min.
Typ.
Max.
Programming time
4-byte
t_P4
—
143
1330
—
96.8
932
μs
Erasure time
Blank check time
1-Kbyte
4-byte
t_E1K
—
8.3
269
—
5.85
t_BC4
—
—
78
—
—
219
ms
50
μs
1-Kbyte
t_BC1K
—
—
1.61
—
—
Erase operation forcible stop time
t_SED
—
—
33.6
—
—
0.369
ms
25.6
μs
Start-up area switching setting time
t_SAS
—
13.2
549
—
7.6
445
ms
Access window time
ROM mode transition wait time 1
ROM mode transition wait time 2
t_AWS
—
13.2
549
—
7.6
t_DIS
2
—
—
2
—
t_MS
3
—
—
3
—
445
ms
—
μs
—
μs
Note:
Note:
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 113 of 121