RX113_15 Datasheet, PDF (107/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
5. Electrical Characteristics
(2) 1/4 Bias Method
Table 5.53 Internal Voltage Boosting Method LCD Characteristics
Conditions: VCC = AVCC0 = VCC_USB = 1.8 V to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
Test
Conditions
LCD output voltage
variation range
V_L1 C1 to C4
connected
VLCD = 04h
0.9
1.0
1.08
V
VLCD = 05h
0.95
1.05
1.13
V
VLCD = 06h
1
1.1
1.18
V
VLCD = 07h
1.05
1.15
1.23
V
VLCD = 08h
1.1
1.2
1.28
V
VLCD = 09h
1.15
1.25
1.33
V
VLCD = 0Ah
1.2
1.3
1.38
V
Doubler output voltage
Tripler output voltage
Quadruply output voltage
Reference voltage setup
time*¹
V_L2
V_L3
V_L4
t_VL1S
C1 to C5 connected
C1 to C5 connected
C1 to C5 connected
2V_L1 - 0.08 2V_L1
2V_L1
V
3V_L1 - 0.12 3V_L1
3V_L1
V
4V_L1 - 0.16 4V_L1
4V_L1
V
5
—
—
ms
Voltage boost wait time*² t_VLWT C1 to C5 connected
500
—
—
ms
Note 1.
Note 2.
This is the required wait time from when the reference voltage is specified by the VLCD register (or when the internal voltage
boosting method is selected (LCDM0.MDSET1 and MDSET0 = 01b) if the default reference voltage value is used) until voltage
boosting starts (VLCON = 1).
This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled (LCDON = 1).
5.9.3
Capacitor Split Method
Table 5.54 Capacitor Split Method
Conditions: VCC = AVCC0 = VCC_USB = 2.2 to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol Min.
Typ.
Max.
Unit
External capacitance connected between CAPH and CAPL pins
C1
0.33
0.47
0.61
μF
External capacitor connected to V_L1 pin
External capacitor connected to V_L2 pin
External capacitor connected to V_L3 pin
External capacitor connected to V_L4 pin
C2
0.33
0.47
0.61
μF
C3
0.33
0.47
0.61
μF
C4
0.33
0.47
0.61
μF
C5
0.33
0.47
0.61
μF
Test
Conditions
(1) 1/3 Bias Method
Table 5.55 Capacitor Split Method LCD Characteristics
Conditions: VCC = AVCC0 = VCC_USB = 2.2 to 3.6V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
V_L4 voltage*¹
V_L4 C1 to C4 connected
—
VCC
—
V
V_L2 voltage*¹
V_L2 C1 to C4 connected 2/3V_L4-0.07 2/3V_L4 2/3V_L4+0.07
V
V_L1 voltage**¹
V_L1 C1 to C4 connected 1/3V_L4-0.08 2/3V_L4 2/3V_L4+0.08
V
Capacitor split wait time*¹
t_WAIT
100
—
—
ms
Note 1. This is the wait time from when voltage bucking is started (VLCON = 1) until display is enabled (LCDON = 1).
Test
Conditions
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 107 of 121