RX113_15 Datasheet, PDF (78/121 Pages) Renesas Technology Corp – Renesas MCUs

RX113 Group
5. Electrical Characteristics
Table 5.27 Timing of Recovery from Low Power Consumption Modes (4)
Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Recovery time from deep High-speed mode*²
sleep mode*¹
Middle-speed mode*³
Low-speed mode*⁴
Symbol
t_DSLP
t_DSLP
t_DSLP
Min.
—
—
—
Typ.
2
3
400
Max.
3.5
4
500
Unit
Test Conditions
μs
μs
μs
Note 1. Oscillators continue oscillating in deep sleep mode.
Note 2. When the frequency of the system clock is 32 MHz.
Note 3. When the frequency of the system clock is 12 MHz.
Note 4. When the frequency of the system clock is 32.768 kHz.
Oscillator
ICLK
IRQ
Deep sleep mode
t_DSLP
Figure 5.30 Deep Sleep Mode Recovery Timing
Table 5.28 Timing of Recovery from Low Power Consumption Modes (5)
Operating Mode Transition Time
Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Mode before Transition
Mode after Transition
ICLK Frequency
Transition Time
Unit
Min.
Typ.
Max.
High-speed operating mode Middle-speed operating mode
8 MHz
—
10
—
μs
Middle-speed operating mode High-speed operating mode
8 MHz
—
37.5
—
μs
Low-speed operating mode
Middle-speed operating mode,
high-speed operating mode
32.768 kHz
—
213.62
—
μs
Middle-speed operating mode, Low-speed operating mode
high-speed operating mode
32.768 kHz
—
183.11
—
μs
Note: When PCLKB, PCLKD, and FCLK are set to the same frequency division ratio as ICLK.
R01DS0216EJ0102 Rev.1.02
Dec 01, 2014
Page 78 of 121