PD72042B_15 Datasheet, PDF (87/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

Circuit connected to IEBus
µPD72042B
RL
Bus+
Bus−
µ PD72042B
RS
RS
Cg
Cg
RL
Remark Protective resistor
Terminating resistor
Load capacitor
RS = 180 Ω ± 5 %
RL = 120 Ω ± 5 %
Cg
Please use the capacitor on the bus line under the capacitance shown in the table below.
System clock (fX)
6 MHz
6.29 MHz
Maximum capacitance between
the Bus+ pin and Bus– pin
8000 pF
7100 pF
Therefore, the total load capacitance CT between the Bus+ pin and Bus– pin is as follows.
Σ^{N 1}
CT =
Cg + CW
2
CW: Wiring capacitance
Cautions 1. The circuit constants in the above figure are applied when each unit connected to the IEBus
line uses the µPD72042B.
2. The load capacitor connected to the bus line should be located closer to the IEBus than to
the protective resistor, as shown in the figure above.
3. Do not insert inductive parts into the bus line.
Data Sheet S13990EJ3V0DS
85