PD72042B_15 Datasheet, PDF (25/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

µPD72042B
Table 3-1 I/O States of the SIO (SI) and SO Pins
RESET
CS
0
×
1
1
1
0
SEL
C/D
SI (SIO)
SO
State
Three-wire/two-wire
Operating mode
×
×
I
Hi-Z
–
Reset state
×
×
I
Hi-Z
–
Chip nonselected state
1
1
I
O*
Three-wire
Control mode
0
Data write mode
O
Data read mode
0
1
I
Hi-Z
Two-wire
Control mode
0
Data write mode
O
Data read mode
I : Input state
O : Output state
O* : State in which 1 is output
Hi-Z : High-impedance state
× : Don’t care
3.2 DATA TRANSFER FORMAT
3.2.1 Three-Wire Data Transfer (SEL = 1)
(1) Control mode
When the C/D input is set high, control mode is set to control data transfer. Data transfer control involves the
following processing.
1 Register address setting
2 Register read/write selection
C/D
SCK
R
SI
× × × / A0 A1 A2 A3
W
Remark After reset (RESET) cancellation, the state enabling writing to the register at address 0000B is set.
Caution In control mode, each data item is read every eighth clock pulse. (Data of less than eight clock
periods is ignored.)
Data Sheet S13990EJ3V0DS
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