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PD72042B_15 Datasheet, PDF (28/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
µPD72042B
(3) Data write mode
C/D
SCK
SIONote
× × × 0 A0 A1 A2 A3
State
Serial clock counter
reset pointer
Control mode
(selection of register write)
D0 D1 D2 D3 D4 D5 D6 D7
Data write mode
Note
SIO pin input state
Caution Register overwrite is started immediately after the eighth clock rising edge. All registers other
than TBF are overwritten at the eighth clock rising edge. (Data of less than eight clock periods
is ignored.)
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Data Sheet S13990EJ3V0DS