PD72042B_15 Datasheet, PDF (30/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

µPD72042B
3.4 STANDBY MODE SETTING AND CANCELLATION
Standby mode can be set by setting STREQ of the CTR register to 1. The XI pin for oscillation is tied to GND,
and the impedance of the XO pin goes high.
In standby mode (with the STM flag of the FLG register set to 1), only the following registers can be accessed:
Writable register : CTR (address 0000B)
Readable register : FLG (address 0001B)
Standby mode can be cancelled by setting STREQ of the CTR register to 0.
Caution Do not read any data from internal registers via the serial I/O during the period from when a
microcomputer sets the STREQ flag to 1 to when the µPD72042B enters the standby mode. This
period is one-communication frame at maximum.
3.5 RESET MODE SETTING AND CANCELLATION
For hardware reset, the registers are initialized and standby mode is set. (During this period, oscillation is stopped.)
For software reset, the registers are initialized, and operation is started.
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Data Sheet S13990EJ3V0DS