PD72042B_15 Datasheet, PDF (42/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

µPD72042B
FLG
Flag register
Address : 0001B (1H)
Read/write : Read
When reset : 00000010B
FLG is a one-byte read register used to indicate statuses such as the communication state, command execution
state, and interrupt state.
b7
b6
b5
b4
b3
b2
b1
— MARQ STRQ SLRE CEX RAW STM
b0
IRQ FLG
[MARQ]
1 : A request for communication as the master unit is being made.
0 : No request for communication as the master unit is being made. Data can be written to the SAR1, SAR2, and
MCR registers.
The MARQ flag is set and reset as described below.
• Set : When the CEX flag of the FLG register is set to 0 after 1000 or 1001 is set in COMC of the CMR register
• Reset : When master communication is terminated
[STRQ]
1 : A request for slave unit data transmission is being made.
0 : No request for slave unit data transmission is being made.
The STRQ flag is set and reset as described below.
• Set : When the CEX flag of the FLG register is set to 0 after 1011 or 1100 is set in COMC of the CMR register
• Reset : When slave data transmission is terminated
[SLRE]
1 : Slave reception or broadcast is allowed.
0 : Slave reception and broadcast are not allowed.
The SLRE flag is set and reset as described below.
• Set : When REEN of the CTR register is set to 1
• Reset : When slave reception or broadcast reception is terminated normally or suspended, or when CEX of
the FLG register is set to 0 after 1111 is set in COMC of the CMR register
When SLRE = 0, bit 1 of the slave status is set to 1 regardless of the state of RBF; communication frame reception
based on the AH, BH, EH, and FH control bits, received from the master station, is not performed.
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Data Sheet S13990EJ3V0DS