PD72042B_15 Datasheet, PDF (59/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

µPD72042B
RBF
Reception buffer
Address : 1110B (EH)
Read/write : Read
When reset : Undefined
RBF is a 40-byte FIFO buffer used to hold a transmitter address, control bits, data-length bits, and reception data
for master reception, slave reception, or broadcast reception.
RBF can be read by the microcomputer when the REP flag of the STR register is 0 (indicating that RBF is not empty).
When an optional function is set in the CMR register with MFC = 1, multiple communication frames can be held
in RBF until RBF becomes full.
In master reception, slave reception, and broadcast reception, the format below is used to transfer data from RBF
to the microcomputer.
RBF
High-order 4 bits
Low-order 4 bits
Byte 1
Transmitter address (high-order 8 bits)
Byte 2 Transmitter address (low-order 4 bits)
Control bits
Byte 3
Data-length bits
Byte 4
First byte of reception data
Byte 5
Second byte of reception data
Communication frame 1
Last reception data
Transmitter address (high-order 8 bits)
Transmitter address (low-order 4 bits)
Control bits
Data-length bits
First byte of reception data
Second byte of reception data
Communication frame 2
Last reception data
Byte 40
Data Sheet S13990EJ3V0DS
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