PD72042B_15 Datasheet, PDF (21/92 Pages) Renesas Technology Corp – LSI DEVICE FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL

µPD72042B
MSB
bit 7
Fig. 2-2 Slave Status (SSR) Bit Format
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
LSB
bit 0
Table 2-5 Slave Status Meanings
Bit
Bit 0^{Note 1}
Bit 1^{Note 2}
Bit 2
Bit 3
Bit 4^{Note 3}
Bit 5
Bit 7
Bit 6
Value
0
1
0
1
0
1
0
0
1
0
00
01
10
11
Meaning
The slave transmission buffer is empty.
The slave transmission buffer is not empty.
The slave reception buffer is empty.
The slave reception buffer is not empty.
The unit is not locked.
The unit is locked.
Fixed at 0
Slave transmission disabled
Slave transmission enabled
Fixed at 0
Mode 0
Mode 1
Indicates the highest
mode supported by the
unit^{Note 4}.
Reserved for future expansion
Notes 1. The slave transmission buffer is accessed during a data read operation (control bits: 3H, 7H).
For the µPD72042B, this buffer corresponds to the TBF available when STRQ of the FLG register is set
to 1.
2. The slave reception buffer is accessed during a data write operation (control bits: 8H, AH, BH, EH, FH).
For the µPD72042B, this buffer corresponds to the RBF available when SLRE of the FLG register is set
to 1.
3. The value of bit 4 can be selected by using the UAR1 register.
4. Bits 7 and 6 are currently fixed to 10 in the hardware of the µPD72042B.
(2) Data/command transfer (control bits: Read (3H, 7H), write (AH, BH, EH, FH))
When data read (3H, 7H) is set, the data in the data buffer of the slave unit is read into the master unit.
When data write (BH, FH) or command write (AH, EH) is set, the data received by the slave unit is processed
according to the operation specifications for the slave unit.
Remarks 1. The user can select data and commands as necessary according to the system.
2. 3H, AH, and BH may cause locking, depending on the communication conditions and status.
Data Sheet S13990EJ3V0DS
19