H8SX1668R Datasheet, PDF (778/1504 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 14 16-Bit Timer Pulse Unit (TPU)
(1) Example of PWM Mode Setting Procedure
Figure 14.21 shows an example of the PWM mode setting procedure.
PWM mode
Select counter clock
[1]
Select counter clearing source [2]
Select waveform output level [3]
[1] Select the counter clock with bits TPSC2 to
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and CKEG0 in
TCR.
[2] Use bits CCLR2 to CCLR0 in TCR to select the
TGR to be used as the TCNT clearing source.
[3] Use TIOR to designate TGR as an output
compare register, and select the initial value and
output value.
Set TGR
Set PWM mode
Start count
[4]
[4] Set the cycle in TGR selected in [2], and set the
duty in the other TGRs.
[5]
[5] Select the PWM mode with bits MD3 to MD0 in
TMDR.
[6]
[6] Set the CST bit in TSTR to 1 to start the count
operation.
<PWM mode>
Figure 14.21 Example of PWM Mode Setting Procedure
(1) Examples of PWM Mode Operation
Figure 14.22 shows an example of PWM mode 1 operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the cycle, and the value set in TGRB register as the
duty cycle.
Rev. 2.00 Sep. 24, 2008 Page 746 of 1468
REJ09B0412-0200