H8SX1668R Datasheet, PDF (256/1504 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 9 Bus Controller (BSC)
Divided clock
synchronization
cycle
T_sy
T₁
T₂
T₃
Iφ
Bφ
Address
CSn
AS
RD
Read _{D15 to D8}
D7 to D0
LHWR
Write
LLWR
D15 to D8
D7 to D0
BS
RD/WR
Figure 9.7 System Clock: External Bus Clock = 2:1, External 3-State Access
Rev. 2.00 Sep. 24, 2008 Page 224 of 1468
REJ09B0412-0200