 English |
|
|
|
|
|
|
|
| UPD70F3793GC-UEU-AX Datasheet, PDF (759/1113 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-L Microcontrollers | |||
| |||
| ◁ |
V850ES/JG3-L
CHAPTER 19 I2C BUS
Figure 19-24. Example of Slave to Master Communication
(When Wait Is Changed from 8 Clocks to 9 Clocks for Master and 9-Clock Wait Is Selected for Slave) (3/3)
Processing by master device
(c) Stop condition
IICn
IICn â FFH Note
ACKDn
STDn
SPDn
WTIMn
ACKEn
MSTSn
STTn
SPTn
WRELn
Note
INTIICn
TRCn
Transfer lines
SCL0n
12345678
SDA0n
D7 D6 D5 D4 D3 D2 D1 D0
Processing by slave device
IICn
IICn â data
ACKDn
STDn
SPDn
WTIMn H
ACKEn H
MSTSn L
STTn L
SPTn L
WRELn
INTIICn
TRCn
9
NACK
IICn â address
(when SPIEn = 1)
Stop
condition
1
AD6
Start
condition
(when SPIEn = 1)
Note To cancel master wait, write FFH to IICn or set WRELn.
Remark n = 0 to 2
R01UH0165EJ0700 Rev.7.00
Sep 22, 2011
Page 759 of 1113
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese