UPD70F3793GC-UEU-AX Datasheet, PDF (406/1113 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-L Microcontrollers

V850ES/JG3-L
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Figure 8-46. Register Settings in PWM Output Mode (2/3)
(c) TMQ0 I/O control register 0 (TQ0IOC0)
TQ0OL3 TQ0OE3 TQ0OL2 TQ0OE2 TQ0OL1 TQ0OE1 TQ0OL0 TQ0OE0
TQ0IOC0 0/1
0/1
0/1
0/1
0/1
0/1
0/1^Note
0/1^Note
0: Disable TOQ00 pin output.
1: Enable TOQ00 pin output.
Output level when TOQ00
pin is disabled:
0: Low level
1: High level
0: Disable TOQ01 pin output.
1: Enable TOQ01 pin output.
Active level of TOQ01 pin
output:
0: High level
1: Low level
0: Disable TOQ02 pin output.
1: Enable TOQ02 pin output.
Active level of TOQ02 pin
output:
0: High level
1: Low level
0: Disable TOQ03 pin output.
1: Enable TOQ03 pin output.
Active level of TOQ03 pin
output:
0: High level
1: Low level
• When TQ0OLk bit is 0:
• When TQ0OLk bit is 1:
16-bit counter
16-bit counter
TOQ0k pin output
TOQ0k pin output
(d) TMQ0 I/O control register 2 (TQ0IOC2)
TQ0EES1 TQ0EES0 TQ0ETS1 TQ0ETS0
TQ0IOC2
0
0
0
0
0/1
0/1
0
0
These bits select the
valid edge of the external
trigger input.
(e) TMQ0 counter read buffer register (TQ0CNT)
The value of the 16-bit counter can be read by reading this register.
Note Set this bit to 0 when not using the TOQ00 pin in the PWM output mode.
R01UH0165EJ0700 Rev.7.00
Sep 22, 2011
Page 406 of 1113