UPD70F3793GC-UEU-AX Datasheet, PDF (61/1113 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-L Microcontrollers

V850ES/JG3-L
3.4 Address Space
CHAPTER 3 CPU FUNCTION
3.4.1 CPU address space
For instruction addressing, up to a combined total of 16 MB of external memory area and internal ROM area, plus
an internal RAM area, are supported in a linear address space (program space) of up to 64 MB. For operand
addressing (data access), up to 4 GB of a linear address space (data space) is supported. The 4 GB address space,
however, is viewed as 64 images of a 64 MB physical address space. This means that the same 64 MB physical
address space is accessed regardless of the value of bits 31 to 26.
Figure 3-1. Address Space Image
Data space
Image 63^Note
Image 62^Note
4 GB
•
•
•
Program space
Access-prohibited area
Internal RAM area
Image 2^Note
Image 1^Note
On-chip peripheral I/O area
Internal RAM area
Access-prohibited area
64 MB Access-prohibited area
Image 0
External memory area, etc
16 MB
Internal ROM area
(external memory)
External memory area, etc
16 MB
Internal ROM area
(external memory)
Note Image 0 appears repeatedly for images 1 to 63.
R01UH0165EJ0700 Rev.7.00
Sep 22, 2011
Page 61 of 1113