UPD70F3793GC-UEU-AX Datasheet, PDF (196/1113 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-L Microcontrollers

V850ES/JG3-L
(4) Word access (32 bits)
CHAPTER 5 BUS CONTROL FUNCTION
(a) 16-bit data bus width (1/2)
32-bit data is transmitted/received via a 16-bit bus. Therefore, if an even address is specified, the data
is transmitted/received in two accesses in 16-bit units. If an odd address is specified, the lower
quarter-word data is transmitted/received to/from the higher byte (first access), the middle halfword data
is transmitted/received to/from the middle bytes (second access), and the upper quarter-word data is
transmitted/received to/from the lower byte (third access), of the external data bus address.
<1> Access to address (4n)
First access
31
24
23
16
Address
15
15
4n + 1
8
8
7
7
0
Word data
4n
0
External
data bus
Second access
31
24
23
16
Address
15
15
4n + 3
8
8
7
7
0
Word data
4n + 2
0
External
data bus
<2> Access to address (4n + 1)
First access
31
24
23
16
Address
15
15
4n + 1
8
8
7
7
0
Word data
0
External
data bus
Second access
31
24
23
16
15
8
7
0
Word data
Address
15
4n + 3
8
7
4n + 2
0
External
data bus
Third access
31
24
23
16
Address
15
15
8
7
0
Word data
8
7
4n + 4
0
External
data bus
R01UH0165EJ0700 Rev.7.00
Sep 22, 2011
Page 196 of 1113