UPD70F3793GC-UEU-AX Datasheet, PDF (1038/1113 Pages) Renesas Technology Corp – RENESAS MCU V850ES/Jx3-L Microcontrollers

V850ES/JG3-L
CHAPTER 34 ELECTRICAL SPECIFICATIONS (μ PD70F3841, 70F3842)
34.5 Regulator Characteristics
(TA = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, VSS = EVSS = AVSS = 0 V)
Parameter
Input voltage
Symbol
VDD
Conditions
fXX = 20 MHz (MAX.)
fXX = 5 MHz (MAX.)
fXX = 2.5 MHz (MAX.)
Data retained (STOP mode)
MIN.
TYP.
MAX.
Unit
2.7
3.6
V
2.2
3.6
V
2.0
3.6
V
1.9
3.6
V
Output voltage
Regulator output
stabilization time
VRO
VDD = 2.7 to 3.6 V
tREG
After VDD reaches 2.7 V (MIN.),
stabilization capacitance C = 4.7 μF
(recommended value) connected to
REGC pin
2.5
V
1
ms
After VDD reaches 2.2 V (MIN.),
stabilization capacitance C = 4.7 μF
(recommended value) connected to
REGC pin
3.5
ms
After VDD reaches 2.0 V (MIN.),
stabilization capacitance C = 4.7 μF
(recommended value) connected to
REGC pin
4.5
ms
External capacitance
REGC
Permissible error of external capacitance
3.76
4.70
5.64
μF
to be connected to REGC pin
VDD
VRO
tREG
RESET
R01UH0165EJ0700 Rev.7.00
Sep 22, 2011
Page 1038 of 1113