R8CL35A Datasheet, PDF (739/848 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/Lx SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
34. LCD Drive Control Circuit
34.4 LCD Drive Control
Table 34.4 shows an outline of the LCD drive control procedure.
Table 34.4
LCD Drive Control Procedure and Status of Segment and Common Pins
Procedure
Status of Segment and Common Pins
Reset
LSE0 to LSE7 register setting
• Select segment output pins
LCD display data register initial value setting
• Set the initial value for the data output from the SEG pins
LCD display control register initial value setting
• Set the initial value for the SEG pin control
• I/O port (input)
• High-impedance state
(Depending on the pull-up control
registers)
• High-impedance
LCR3 register setting
• LCKS1 to LCKS0: Select the LCD clock source
• LPSC2 to LPSC0: Select the division ratio
LCR2 register setting
• LDSPC: Enable LCD data display control
• LDFR2 to LDFR0: Select the LCD data display control
interval
VL1 to VL4
Division resistor
connected externally
Voltage multiplier used
LCR1 register setting
• LVUPE: Enable the voltage multiplier
• LVURS: Select the reference voltage for the voltage
multiplier
• LVWT1 to LVWT0: Select the wait time for the voltage
multiplier
• LVLS3 to LVLS0: Select the VL1 internally-generated
reference voltage
LCR0 register setting
• LSTAT: Start LCD control
• LDSPE: Enable LCD display
• LBAS1 to LBAS0: Select the bias
• LWAV: Select LCD waveform control
• LDTY2 to LDTY0: Select the duty
LCD display data register setting
• Set the data output from the SEG pins
LCR2 register setting
• LDSPC: Enable LCD data display control
• LDFR2 to LDFR0: Select the LCD data display control
interval
At start of LCD control
• When the LDSPE bit is set to 0, the
segment and common pins output a
low-level signal.
• When the LDSPE bit is set to 1 and
the LVUPE bit is set to 0, the
segment and common pins output
the content of the LCD display data
register.
• When the LDSPE bit is set to 1 and
the LVUPE bit is set to 1, the
segment and common pins output
the content of the LCD display data
register after the time specified by
bits LVWT0 and LVWT1 has
elapsed.
REJ09B0441-0010 Rev.0.10 Jul 30, 2008
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