English
Language : 

R8CL35A Datasheet, PDF (176/848 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/Lx SERIES
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
9. Clock Generation Circuit
9.6.7 fOCO-S
fOCO-S is an operating clock for the voltage detection circuit.
This clock is generated by the low-speed on-chip oscillator and supplied by setting the CM14 bit to 0 (low-
speed on-chip oscillator on).
In wait mode, the fOCO-S clock does not stop.
9.6.8 fOCO128
fOCO128 clock is generated by fOCO-S or fOCO-E divided by 128. fOCO-S divided by 128 is selected by
setting the FRA03 bit to 0 and fOCO-F divided by 128 is selected by setting the FRA03 bit to 1.
fOCO128 is configured as the capture signal used in the TRCGRA register for timer RC and timer RD0 for
timer RD.
9.6.9 fC-LCD
fC-LCD is used in the LCD waveform control circuit.
Use this clock only while the XCIN clock oscillation stabilizes.
9.6.10 fC, fC2, fC4, and fC32
fC, fC2, fC4, and fC32 are used for timers RA, RD, RE and the serial interface.
Use theses clocks while the XCIN clock oscillation stabilizes.
9.6.11 fOCO-WDT
fOCO-WDT is an operating clock for the watchdog timer.
This clock is generated by the low-speed on-chip oscillator for the watchdog timer and supplied by setting the
CSPRO bit in the CSPR register to 1 (count source protection mode enabled).
In count source protection mode for the watchdog timer, the fOCO-WDT clock does not stop.
REJ09B0441-0010 Rev.0.10 Jul 30, 2008
Page 140 of 809