R8CL35A Datasheet, PDF (184/848 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/Lx SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
10. Power Control
10.2.3 System Clock Control Register 3 (CM3)
Address 0009h
Bit b7
b6
b5
b4
b3
b2
Symbol CM37 CM36 CM35
—
—
—
After Reset 0
0
0
0
0
0
b1
b0
—
CM30
0
0
Bit Symbol
Bit Name
Function
R/W
b0 CM30 _{Wait control bit} ⁽¹⁾
0: Other than wait mode
R/W
1: MCU enters wait mode
b1
— Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b2
—
b3
—
b4
—
b5 CM35 CPU clock division ratio select bit 0: Following settings are enabled:
R/W
when exiting wait mode
CM06 bit in CM0 register
Bits CM16 and CM17 in CM1 register
1: No division ⁽²⁾
b6 CM36 CPU clock select bit when exiting ^{b7 b6}
R/W
b7 CM37 ^{wait or stop mode}
0 0: MCU exits with the CPU clock used
R/W
immediately before entering wait or stop mode
0 1: Do not set.
1 0: High-speed on-chip oscillator clock selected ⁽³⁾
1 1: XIN clock selected ⁽⁴⁾
Notes:
1. When the MCU exits wait mode by a peripheral function interrupt, the CM30 bit is set to 0 (other than wait mode).
2. Set the CM35 bit to 0 in stop mode. When the MCU enters wait mode, if the CM35 bit is set to 1 (no division), the
CM06 bit in the CM0 register is set to 0 (bits CM16 and CM17 enabled) and bits CM17 and CM16 in the CM1
register is set to 00b (no division mode).
3. When bits CM37 to CM36 are set to 10b (high-speed on-chip oscillator clock selected), the following will be set
when the MCU exits wait mode or stop mode:
• OCD2 bit in OCD register = 1 (on-chip oscillator selected)
• FRA00 bit in FRA0 register = 1 (high-speed on-chip oscillator on)
• FRA01 bit in FRA0 register = 1 (high-speed on-chip oscillator selected)
4. When bits CM37 to CM36 are set to 11b (XIN clock selected), the following will be set when the MCU exits wait
mode or stop mode.
• OM05 bit in OM0 register = 1 (XIN clock oscillates)
• OM13 bit in OM1 register = 1 (XIN-XOUT pin)
• OCD2 bit in OCD register = 0 (XIN clock selected)
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM3 register.
CM30 bit (Wait Control Bit)
When the CM30 bit is set to 1 (MCU enters wait mode), the CPU clock stops (wait mode). However, the XIN
clock, XCIN clock, and on-chip oscillator clock do not stop, so peripheral functions using these clocks continue
operating.
The MCU exits wait mode by a reset or peripheral function interrupt. If the MCU enters wait mode while the I
flag is set to 0 (maskable interrupt disabled), it resumes executing the instruction immediately after the
instruction to set the CM30 bit to 1 when exiting wait mode. If the MCU enters wait mode with the WAIT
instruction, interrupt handling is performed by the CPU when exiting wait mode.
REJ09B0441-0010 Rev.0.10 Jul 30, 2008
Page 148 of 809