R8CL35A Datasheet, PDF (408/848 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/Lx SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
21. Timer RD
21.5.1 Module Standby Control Register (MSTCR)
Address 0008h
Bit b7
b6
b5
b4
b3
b2
b1
b0
Symbol — MSTTRG MSTTRC MSTTRD MSTIIC —
—
—
After Reset 0
0
0
0
0
0
0
0
Bit Symbol
Bit Name
Function
b0
— Nothing is assigned. If necessary, set to 0. When read, the content is 0.
b1
—
b2
—
b3 MSTIIC _{SSU, I}²_{C bus standby bit}
0: Active
1: Standby ⁽¹⁾
b4 MSTTRD Timer RD standby bit
0: Active
1: Standby ⁽²⁾
b5 MSTTRC Timer RC standby bit
0: Active
1: Standby ⁽³⁾
b6 MSTTRG Timer RG standby bit
0: Active
1: Standby ⁽⁴⁾
b7
— Nothing is assigned. If necessary, set to 0. When read, the content is 0.
R/W
—
R/W
R/W
R/W
R/W
—
Notes:
1. When the MSTIIC bit is set to 1 (standby), any access to the SSU or the I²C bus associated registers (addresses
0193h to 019Dh) is disabled.
2. When the MSTTRD bit is set to 1 (standby), any access to the timer RD associated registers (addresses 0135h
to 015Fh) is disabled.
3. When the MSTTRC bit is set to 1 (standby), any access to the timer RC associated registers (addresses 0120h
to 0133h) is disabled.
4. When the MSTTRG bit is set to 1 (standby), any access to the timer RC associated registers (addresses 0170h
to 017Fh) is disabled.
REJ09B0441-0010 Rev.0.10 Jul 30, 2008
Page 372 of 809