R8CL35A Datasheet, PDF (645/848 Pages) Renesas Technology Corp – RENESAS MCU R8C FAMILY / R8C/Lx SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
28. I²C bus Interface
SCL
(master output)
SDA
(master output)
SDA
(slave output)
TDRE bit in ¹
ICSR register
0
TEND bit in ¹
ICSR register
0
ICDRT register
1
2
3
4
5
6
7
8
9
b7
b6
b5
b4
b3
b2
b1
b0
Slave address
R/W
A
1
2
b7
b6
Address + R/W
Data 1 Data 2
ICDRS register
Address + R/W
Data 1
Program processing (2) Instruction for
start condition
generation
(3) Write data to the ICDRT register
(1st byte).
(4) Write data to the ICDRT register ^{(5) Write data to the ICDRT register}
(2nd byte).
(3rd byte).
Figure 28.4 Operating Timing in Master Transmit Mode (I²C bus Interface Mode) (1)
SCL
(master output)
SDA
(master output)
9
1
2
3
4
5
6
7
8
9
b7
b6
b5
b4
b3
b2
b1
b0
SDA
(slave output)
A
A/A
TDRE bit in ¹
ICSR register
0
TEND bit in ¹
ICSR register
0
ICDRT register
Data n
ICDRS register
Data n
Program processing _{(3) Write data to the ICDRT register.}
(6) Generate a stop condition
and set the TEND bit to 0.
(7) Set to slave receive mode.
Figure 28.5 Operating Timing in Master Transmit Mode (I²C bus Interface Mode) (2)
REJ09B0441-0010 Rev.0.10 Jul 30, 2008
Page 609 of 809