M16C6K7 Datasheet, PDF (72/285 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Rev.1.0
DMAC
Mitsubishi microcomputers
M16C / 6K7 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(1) 8-bit transfers
16-bit transfers from even address and the source address is even.
BCLK
Address
bus
CPU use
Source Destination ^Dummy
cycle
CPU use
RD signal
WR signal
Data
bus
CPU use
Source Destination ^Dummy
cycle
CPU use
(2) 16-bit transfers and the source address is odd
Transferring 16-bit data on an 8-bit data bus (In this case, there are also two destination write cycles).
BCLK
Address
bus
RD signal
CPU use
Source Source + 1 Destination ^Dummy
cycle
CPU use
WR signal
Data
bus
CPU use
Source Source + 1 Destination ^Dummy
cycle
CPU use
(3) One wait is inserted into the source read under the conditions in (1)
BCLK
Address
bus
RD signal
CPU use
Source
Destination ^Dummy
cycle
WR signal
Data
bus
CPU use
Source
Destination ^Dummy
cycle
CPU use
CPU use
(4) One wait is inserted into the source read under the conditions in (2)
(When 16-bit data is transferred on an 8-bit data bus, there are two destination write cycles).
BCLK
Address
bus
CPU use
Source
Source + 1
Destination ^Dummy
cycle
CPU use
RD signal
WR signal
Data
bus
CPU use
Source
Source + 1
Destination ^Dummy
cycle
CPU use
Note: The same timing changes occur with the respective conditions at the destination as at the source.
Fig.EC-5 Example of the transfer cycles for a source read
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