M16C6K7 Datasheet, PDF (175/285 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Rev.1.0
MULTI-MASTER I²C-BUS Interface
Mitsubishi microcomputers
M16C / 6K7 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MULTI-MASTER I²C-BUS INTERFACE
The multi-master I²C-BUS interface is a serial communication circuit based on Philips I²C-BUS data transfer
format. 2 independ channels, with both arbitration lost detection and a synchronous functions, are built in for
the multi-master serial communication. Fig.GC-1 shows a block diagram of the multi-master I²C-BUS inter-
face and Table.GC-1 lists the multi-master I²C-BUS interface functions. The multi-master I²C-BUS interface
consists of the I²C address register, the I²C data shift register, the I²C clock control register, the I²C control
register 1, I²C control register 2, the I²C status register, the I²C start/stop condition control register and other
control circuits.
Table.GC-1 Multi-master I²C-BUS interface functions
Item
Function
Based on Philips I²C-BUS standard:
10-bit addressing format
Format
7-bit addressing format
High-speed clock mode
Standard clock mode
Based on Philips I²C-BUS standard:
Master transmission
Communication mode
Master reception
Slave transmission
Slave reception
SCL clock frequency
16.1kHz to 400kHz (at VIIC = 4MHz)
*VIIC=I²C system clock
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